With each generation of microelectronic semiconductor devices, e.g., microprocessors, memories, application specific integrated circuits, and other devices, the speed at which these devices operate increases incrementally. In the same technology node, SiGe heterojunction bipolar transistor (HBT) devices have higher speeds than the field effect transistors (FET) in a CMOS technology. Due to this higher speed performance of SiGe HBTs and other related reasons, bipolar complimentary metallic oxide semiconductor (BiCMOS) fabrication is finding more use in a variety of application in semiconductor devices.
A conventional BiCMOS bipolar transistor 20 is shown in FIG. 1. Transistor 20 shown is an n-p-n transistor having an n-type emitter 24, a p-type base 28, and an n-type collector generally represented by doped collector pedestal 32 formed in a wafer 36. In addition to collector pedestal 32, wafer 36 includes a first deep trench insulator 40 and a second shallow trench isolator (STI) 44 for isolating transistor 20 from surrounding microelectronic components (not shown), e.g., other transistors, capacitors, or the like. A heavily-doped sub-collector 48 underneath the collector pedestal and the STI 44 provides a low-resistance link to collector contact (not shown). Emitter 24 often generally has a T-shaped vertical cross section so as to provide a relatively small lower portion 52 proximate collector pedestal 32 (to achieve a small cross-sectional area to limit the current flow to the collector) while providing a relatively large upper portion 56 to interface with an emitter contact 58.
Base 28 typically comprises an intrinsic base 60 that includes a thin, generally highly p-doped layer (not shown) located between emitter and collector and an extrinsic base 64 that provides an electrical pathway between a base contact (not shown) and the intrinsic base. During the process of fabricating transistor 20, extrinsic base 64 is typically made by depositing a polysilicon layer 68 atop wafer 36. Subsequently, polysilicon layer 68 is etched to provide a trench 72 for lower portion 52 of emitter 24, and then the emitter is formed. After emitter 24 is formed, polysilicon layer 68 is silicidated with a metal to form a conductor 76 so as to increase the conductance of extrinsic base 64. However, because emitter 24 has already been formed, the portion 80 of extrinsic base 64 beneath emitter 24 is not silicidated due to the presence of the emitter above that blocks metal atom from reaching this portion of the extrinsic base.
The fact that portion 80 of extrinsic base 64 remains unsilicidated is significant because the resistance Rpoly of the polysilicon in this portion is much higher than the resistance Rsilicide of its silicidated counterpart located out from underneath emitter 24. For example, Rpoly may be about 100-200 Ω/sq for a 1000 Å thickness, whereas Rsilicide for one-third of the thickness may be about 8 Ω/sq. Because Rpoly is relatively high, the resistance to current flowing through extrinsic base 64 is relatively high.
As device feature size scales down with advancement in technology, high-speed SiGe HBTs have thinner base to reduce the transit time of electrons to go from emitter to collector, thus increase the unity current gain frequency fT. A thinner base, however, increases the base resistance, limiting maximum achievable oscillation frequency fmax, which is also necessary for high speed application of the devices. Thus it is important to innovate ways to reduce base resistance Rb 